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Hardware Implementation of Artificial Synapses

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DOI: 10.23977/jeis.2023.080206 | Downloads: 26 | Views: 891

Author(s)

Chen Liu 1

Affiliation(s)

1 Nanjing University of Science and Technology, Xiaolingwei, Nanjing, China

Corresponding Author

Chen Liu

ABSTRACT

The simple two-terminal metal-insulator-metal (MIM) structures of memristors make them capable of being integrated into dense crossbar arrays [1, 2]. As shown in Figure 1, a typical crossbar array consists of parallel metal lines, termed word lines and bit lines, respectively, as the top and bottom electrodes that are perpendicular to each other. The bidirectional memory is connected between the word line and the bit line. During the read process, the extra current generated by the natural path represented by the red solid line can reduce the energy consumption of the unselected unit, thus reducing the read mosaic and limiting the size of the array. In order to independently control the read/write operations of each memory unit in the array, the 1T1R structure is proposed.

KEYWORDS

Memristors, sneak path, 1S1R cell

CITE THIS PAPER

Chen Liu, Hardware Implementation of Artificial Synapses. Journal of Electronics and Information Science (2023) Vol. 8: 33-37. DOI: http://dx.doi.org/10.23977/10.23977/jeis.2023.080206.

REFERENCES

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