Author(s)

Yujie Zhu

Corresponding Author

Yujie Zhu

ABSTRACT

This work presents a discussion of the early latch-type Voltage Sense amplifier, two improved latch comparator designs, and a novel edge-race comparator (ERC). The optimum input DC voltage can be used to increase the yield without changing the structure of the StrongARM and without speed penalty. The improved Miyahara’s comparator, with an addition of a charge pump increases the speed by 60%. A bias dynamic comparator with a tail capacitor reduces the average energy consumption to 40% of the previous level. The ERC, consisting of two inverter loops and a distance measurement circuit, is 3.39 times faster at comparing differential voltages of 1mV and 2.73 times less energy efficient than previous work.

KEYWORDS

Voltage detection amplifier, Comparator design, Charge pump